Campus Video Briefing
Eight-chapter TTS briefing covering Keller pedigree, compiler-first architecture, Blackhole specs, facility economics, benchmarks, diligence risks, and Cerebras complementarity. Narration script lives in src/lib/dataCentersContent.ts for producer handoff.
Jim Keller & Engineering Pedigree
Tenstorrent's Blackhole silicon is led by Jim Keller— architect of AMD Zen, Apple mobile SoCs, and Tesla Autopilot hardware. Keller's public thesis emphasises engineering delivery over narrative: predictable AI workloads favour systems you can plan, audit, and operate at facility scale.VERIFIED
AGICY cites Keller's pedigree as a diligence signal, not an endorsement. Silicon Partner compliance: Tenstorrent is an OEM-tier hardware supplier — not a strategic partner validating AGICY's financial model.VERIFIED
A Compiler-First Alternative
Conventional GPU clusters route memory traffic at runtime via warp schedulers and deep cache hierarchies. Tenstorrent positions TT-Forge as compiler-first: tensor movement is planned at compile time for structurally predictable graphs — batch inference, fixed-graph serving, and domain-tuned civil chatbots.VENDOR-CLAIMED
This is a workload-fit argument, not a universal replacement claim. Irregular research training and highly dynamic sparsity may still route to GPU or wafer-scale options per AGICY's compiler-first analysis.DESIGN TARGET
Blackhole Architecture & Galaxy Server
Tenstorrent accelerator module — RISC-V T6 cores (representative hardware imagery)
- 32× Blackhole chips per Galaxy server; RISC-V T6 cores with local SRAM per coreVENDOR-CLAIMED
- ~23 PFLOPs FP8 and ~$110K list per server (vendor-claimed)VENDOR-CLAIMED
- Air-cooled 6U— ~9–12 kW/rack vs liquid-mandatory high-density GPU podsDESIGN TARGET
- Phase 1 fleet: 1,801 Galaxy units → 17T tokens/year sustained targetVERIFIED
GDDR6 vs HBM: Facility Economics
Galaxy uses GDDR6external memory; vendor-claimed compile-time prefetch amortises latency for predictable inference access patterns. Peak bandwidth is lower than HBM stacks, but facility TCO favours air-cooled racks without liquid retrofit CAPEX in Phase 1.VENDOR-CLAIMED
Deep dive: GDDR6, Ethernet, and Open AI Infrastructure Economics.
Ethernet Scale-Out
On-die Ethernet enables Galaxy clusters to scale on standard datacenter fabric — auditable networking without mandatory proprietary link layers. Vasilikos provisions diverse 100GbE/400GbE paths to European IXPs and Mediterranean submarine cable diversity (ARSINOE, UGARIT).DESIGN TARGET
Galaxy & DeepSeek Benchmarks
Tenstorrent reports ~350 tok/s on DeepSeek-R1-class inference and ~$6/M tokens vs ~$30/M on GB300-class systems in vendor presentations. Independent pre-launch testing measured 255 tok/s(EE Times) — plan with a 255–350 tok/s range until AGICY publishes SC-36-class benchmarks.VENDOR-CLAIMED
~90% Hugging Face model compatibility is vendor-claimed for mainstream open-weight imports via PyTorch / TT-Forge.VENDOR-CLAIMED
Open Stack & Diligence Risks
Open ISA (RISC-V), PyTorch, and Hugging Face reduce runtime lock-in — aligned with EU sovereign audit requirements. Standard pre-production risks remain: SDK maturity, yield, firmware stability, leadership continuity, and supplier concentration (including reported acquisition interest).DESIGN TARGET
Full checklist: Tenstorrent Blackhole: Performance Claims and Risks.
Cerebras for Throughput-Critical Workloads
Galaxy is Phase 1 primary — cost-efficient, air-cooled inference for civil workloads at scale. Cerebras CS-3(WSE-3) is evaluated as a Phase 2 option for latency-critical and training-scale jobs. Cerebras announced CS-4on 18 August 2026 (Nexus rack, three WSE-3 Turbo wafers — not a WSE-4 die). Neither SKU is an AGICY order. CS-3 vendor-claimed ~1,500–2,100 tok/s on Llama 3.1 70B-class models, 44 GB on-chip SRAM, weight streaming to 24T-parameter training configurations.VENDOR-CLAIMED
Liquid-cooled CS-3 requires facility retrofit — planned in Phase 2/3 expansion halls. This is complementary silicon routing, not competitive vendor bashing: Galaxy economics today, frontier training optionality tomorrow.DESIGN TARGET
Read more: Cerebras CS-3 / CS-4 hardware · CS-3 research (July 2026).
Vasilikos Campus Infrastructure
Tier IV design target with 2N redundancy, Mediterranean free-cooling advantage, and 42 MW on-site generation (design target) — distinct from the 16.2 MW modelled fleet IT load. Four-phase scale is 7,200 Galaxy servers. Pre-construction; not live megawatts. The campus is engineered for high-density AI — not retrofitted colocation.DESIGN TARGET
| Specification | Phase 1 | Full Build-Out |
|---|---|---|
| On-site generation | 42 MW (target) | Phased expansion |
| Fleet IT load | 16.2 MW (modelled) | — |
| Galaxy servers | 1,801 | 7,200 (four phases) |
| Cooling | Air + free cooling | Hybrid air + liquid (Phase 2+) |
| Network | 100GbE uplinks | 400GbE backbone |
AGICY Relevance
Why this matters for sovereign clients
Public framing per vendor_neutral.md: “Sovereign compute campus, certified for EU workloads; Phase 1 on Tenstorrent Galaxy; architecture supports alternate accelerators via open compilation stacks.”VERIFIED
Phase 1 Galaxy + Phase 2 Cerebras option = breadth for civil workloads — batch inference and education sandboxes on air-cooled economics; frontier training and ultra-low-latency paths where wafer-scale silicon wins on the four gates (performance/watt, TCO, EU supply chain, auditability).